This invention relates to message synchronization between multiple processors.
It is often necessary to synchronize messages passing between processors. Fast and successful synchronization of messages is vital for high performance systems such as network devices that include network processors. Network processors typically include multiple microengines, and often a core processor to manage the microengines. Often these microengines share work on a common task and are required to pass messages between the microengines.
Some network processors include a type of register that is known as a self-destruct register. A read from the register returns the current register state (all bits that were set following the last read operation to the register or after a reset) and atomically clears the register.